Historical Computing And The Busch 2090 – Simulating A Newer CPU Architecture On An Old Processor

20130902_175609-smIt took a while to get hold of one but I finally managed to get a 1980’s Busch 2090 microcomputer I mused about in this and other previous blog posts. What I could only read about in the manual before I could now finally try out myself on this 30 year old machine and true to the saying that when you read something you remember it but when you do something yourself you will understand, I found out quite a number of things I missed when only reading about it. So here’s the tale of working and programming a 30 year old machine that was there to teach kids and adults about how computers work rather than how to work with computers:

The 2090 is programmed on a hexadecimal keyboard (see figure on the left) in a slightly abstracted pseudo machine code. It makes a number of things easier such as querying the keyboard or to display something on the six digit 7-segment display but otherwise it looks like machine code. After doing some more research into the TMS 4 bit processor used in the 2090, I found out that it is a direct descendant of the first Texas instruments microprocessor with a few more input/output lines, RAM and ROM added. Otherwise the processor works as its predecessor, the TMS 1000 from 1972. In other words when the 2090 appeared in 1981 the processor architecture was rather dated already and much more sophisticated processors such as the Intel 8080, the Zilog Z80, the Motorola 6800 and the MOS 6502 were available. While microcomputer learning kits appearing on the market a year or two later used these or other 8 bit processors, Busch decided to use an old 4 bit architecture. I can only speculate why but pricing was perhaps the deciding factor.

Tms1000-architectureSome research on the net revealed some more material about the CPU and other chips used. The manuals of the TMS 1000 architecture that also includes later versions such as the 1400 and 1600 can be found here and here. These documents are quite fascinating from a number of perspectives as they go into details on the architecture and the instruction set and also give an interesting impression of how what we call ’embedded computing systems’ today were programmed in the 1970s. Simulators were used to test the program which were then included in a RAM on the CPU chip as part of the production. No way to change it later on so it better had to be perfect during the production run.

What surprised me most when studying the hardware architecture and instruction set is that it is very different from the pseudo machine code presented to the user. My impression is that the pseudo machine code was very much inspired by newer processor architectures with a lot of registers and a combined instruction and data RAM residing in a separate chip. The TMS 1600, however, has nothing of the sort. Instructions and data are separate in the chip, all ‘real’ machine code instructions are in a ROM that is accessed via an instruction bus that is separate from the bus over which the built-in memory is accessed.

While the pseudo machine code uses 16 registers, the processor itself only has an accumulator register. The 16 registers are simulated by using the 64 x 4 bit RAM of the TMS 1600, which, on the real machine, is accessed as RAM over an address bus and not as registers. In addition, the processor chip as no external bus to connect to external memory. There are input and output lines but their primary purpose is not to act as a bus system. The 2090 however uses an external 1 kbyte RAM that is accessed via those input output lines. In effect, the small operating system simulates an external bus to that memory chip in which the pseudo machine code the user typed in resides. Very impressive!

There are a number of support chips on the board used for purposes such as multiplexing different hardware units such as the keyboard, the display, LEDs, input connectors and the memory on the input/output lines. As the input/output lines are separate on the chip and do not work like a bi-directional bus, one of the support chips offers tri-state capability for some hardware so it can be removed from the bus.

The TMS 1600 also has no stack as we know it today. Instead it has 3 subroutine return registers so up to three subroutines can called at any one time. This is already an improvement over the original TMS 1000 which only had one such register. Another interesting fact is that the TMS 1600 doesn’t have instructions for integer multiplication and division.

Apart from the accumulator register there are the x- and y-registers. These registers, however are used to address the data ram. A separate 6 bit program counter is used to address the ROM. While the pseudo machine code uses a zero flag and a carry flag, something that is part of all popular 8 bit microprocessor architectures even today, there are no such flags in the TMS 1600. Instead, there’s only a status register that acts as a carry and zero flag depending on the operation performed. Also, the processor doesn’t have the capability for indirect or indexed addressing.

Also quite surprising was that there are no binary logic instructions such as AND, OR, XOR etc. in the CPUs instruction. Therefore, these have to be simulated for the pseudo machine code which contains such commands, again resembling the instruction set of other ‘real’ CPUs at the time.

And another nifty detail are the two different kinds of output lines. There are 13 R-output lines that can be freely programmed and some of them are used in the 2090 e.g. for addressing the RAM chip (address bus) and some for writing 4 bit values to the RAM (data bus). In addition there are 8 O-outputs that can’t be freely programmed. Instead they are set via a 5 bit to 8 bit code converter and the conversion table was part of the custom CPU programming. From today’s perspective it’s incredible to see to what lengths they went to reduce the circuit logic complexity. So a 5 bit to 8 bit code converter, what could that be good for? One quite practical application is to illuminate the digits of a 7-segment display. As only one digit of the 6 digit display can be accessed at a time it’s likely that the 8 O-outputs are not only used for addressing the RAM but also to select one of the six numbers of the display.

Virtually traveling back in time and seeing a CPU like this in action rather than just reading about it is incredible. I now understand much better how the CPU architecture we still use today came to be and how limitations were lifted over time. An incredible journey that has led me to a number of other ideas and experiments as you shall read here soon.